Integrated circuits (ICs) and the devices therein are at risk of damage due to electrostatic discharge (ESD) events. Accordingly, it is commonplace to provide an ESD clamp (voltage limiting device) across the input and/or other terminals of such devices and IC's. U.S. 2012/0295414 describes a simple type of ESD clamp device comprising a bipolar transistor which may be connected across terminals of an IC. When the voltage across the terminals rises above the normal operating voltage and reaches a predetermined limit, the bipolar transistor turns on, thereby limiting the voltage across the terminals to a level below that capable of damaging the IC. Another known ESD protection device disclosed in US2012/0250194 comprises a silicon controlled rectifier (SCR) equivalent to a PNP transistor coupled with an NPN transistor whereby the base of the PNP transistor is connected to the collector of the NPN transistor and the base of the NPN transistor is connected to the collector of the PNP transistor. The voltage at which a transistor clamp device triggers can be dependent on the base-collector spacing dimensions of the transistor. US2012/0295414 also discloses a way of increasing the triggering voltage by forming two series-coupled transistors (constituting an SCR clamp) which have different base-collector spacings in a single integrated circuit package. Even higher triggering voltages can be achieved, as proposed in US2012/0295414, by serially cascading two or more of these clamp devices. This arrangement may be useful for high voltage (20 Volt, for example) applications. However, this may complicate the manufacturing process and can be uneconomical in terms of silicon area.